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january 2010 doc id 16873 rev 1 1/23 23 TSC103 high-voltage, high-side current sense amplifier features independent supply and input common-mode voltages wide common-mode operating range: 2.9 to 70 v in single-supply configuration -2.1 to 65 v in dual-supply configuration wide common-mode surviving range: -16 to 75 v (reversed battery and load-dump conditions) supply voltage range: 2.7 to 5.5 v in single-supply configuration low current consumption: i cc max = 360 a pin selectable gain: 20 v/v, 25 v/v, 50 v/v or 100 v/v buffered output applications automotive current monitoring dc motor control photovoltaic systems battery chargers precision current sources current monitoring of notebook computers uninterruptible power supplies high-end power supplies description the TSC103 measures a small differential voltage on a high-side shunt resistor and translates it into a ground-referenced output voltage. the gain is adjustable to four different values from 20 v/v up to 100 v/v by two selection pins. wide input common-mode voltage range, low quiescent current, and tiny tssop8 packaging enable use in a wide variety of applications. the input common-mode and power-supply voltages are independent. the common-mode voltage can range from 2.9 to 70 v in the single- supply configuration or be offset by an adjustable voltage supplied on the vcc- pin in the dual- supply configuration. with a current consumption lower than 360 a and a virtually null input leakage current in standby mode, the power consumption in the applications is minimized. so-8 (plastic package) tssop8 (plastic package) 2 1 3 sel2 vm sel1 6 8 gnd vp 4 ou t 7 vcc- 5 vcc+ pin connections (top view) www.st.com
contents TSC103 2/23 doc id 16873 rev 1 contents 1 application schematic and pin d escription . . . . . . . . . . . . . . . . . . . . . . 3 2 absolute maximum ratings and operating conditions . . . . . . . . . . . . . 6 3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 parameter definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.1 common mode rejection ratio (cmr) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.2 supply voltage rejection ratio (svr) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.3 gain (av) and input offset voltage (v os ) . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.4 output voltage drift versus temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.5 input offset drift versus temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.6 output voltage accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5 maximum permissible voltages on pins . . . . . . . . . . . . . . . . . . . . . . . . 15 6 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 7 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 7.1 so-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 7.2 tssop-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 8 ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 9 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
TSC103 application schematic and pin description doc id 16873 rev 1 3/23 1 application schematic and pin description the TSC103 high-side current sense amplifier ca n be used in either single- or dual-supply mode. in the single-supply configuration, the TSC103 features a wide 2.9 v to 70 v input common-mode range totally independent of the supply voltage. in the dual-supply range, the common-mode range is shifted by the value of the negative voltage applied on the vcc- pin. for instance, with vcc+ = 5 v and vcc- = -5 v, then the input common-mode range is -2 v to 65 v. figure 1. single-supply configuration schematic 5 v v s en s e vo u t lo a d ilo a d r s en s e controller adc gnd vcc gpio1 gpio2 vp vm vcc+ t s c10 3 o u t gnd s el1 s el2 vcc- common-mode volt a ge: 2.9 v to 70 v am04517
application schematic an d pin description TSC103 4/23 doc id 16873 rev 1 figure 2. dual-supply configuration schematic 5 v v s en s e vo u t lo a d ilo a d r s en s e controller adc gnd vcc gpio1 gpio2 -5 v vp vm vcc+ t s c10 3 o u t gnd s el1 s el2 vcc- common-mode volt a ge: -2 v to 65 v am0451 8
TSC103 application schematic and pin description doc id 16873 rev 1 5/23 figure 3. common-mode versus supply voltage in dual-supply configuration ta bl e 1 describes the function of ea ch pin. their position is sh own in the illustration on the cover page and in figure 1 on page 3 . table 1. pin description symbol type function out analog output the out voltage is proportional to the magnitude of the sense voltage v p -v m . gnd power supply ground line. vcc+ power supply positive power supply line. vcc- power supply negative power supply line. vp analog input connection for the external sense resistor. the measured current enters the shunt on the v p side. vm analog input connection for the external sense resistor. the measured current exits the shunt on the v m side. sel1 digital input gain-select pin. sel2 digital input gain-select pin. m a x = 70 v min = 2.9 v m a x = 65 v min = -2.1 v v cc- = 0 v v cc- = -5 v m a x = 60 v min = -7.1 v v cc- = -10 v s ingle- su pply d ua l- su pply vicm common-mode volt a ge oper a ting r a nge am04519
absolute maximum ratings and operating conditions TSC103 6/23 doc id 16873 rev 1 2 absolute maximum ratings and operating conditions table 2. absolute maximum ratings symbol parameter value unit v id input pins differential voltage (v p -v m )20v v in_sense sensing pins input voltages (v p , v m ) (1) 1. these voltage values are measured with respect to the v cc- pin. -16 to 75 v v in_sel gain selection pins input voltages (sel1, sel2) (2) 2. these voltage values are measured with respect to the gnd pin. -0.3 to v cc+ +0.3 v v cc+ positive supply voltage (2) -0.3 to 7 v v cc+ -v cc- dc supply voltage 0 to 15 v v out dc output pin voltage (2) -0.3 to v cc+ +0.3 v t stg storage temperature -55 to 150 c t j maximum junction temperature 150 c r thja tssop8 thermal resistance junction to ambient 120 c/w so-8 thermal resistance junction to ambient 125 c/w esd hbm: human body model (3) 3. human body model: a 100 pf capacit or is charged to the specified voltage, then discharged through a 1.5 k resistor between two pins of the device. this is done for all couples of connected pin combinations while the other pins are floating. 2.5 kv mm: machine model (4) 4. machine model: a 200 pf capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 ). this is done for all couples of connected pin combinations whil e the other pins are floating. 150 v cdm: charged device model (5) 5. charged device model: all pins plus package ar e charged together to the specified voltage and then discharged directly to ground. 1.5 kv table 3. operating conditions symbol parameter value unit v cc+ supply voltage in single-supply configuration from t min to t max (v cc- connected to gnd = 0 v) 2.7 to 5.5 v v cc- negative supply voltage in dual-supply configuration from t min to t max v cc+ = 5.5 v max -8 to 0 v v cc+ = 3 v max -11 to 0 v v icm common-mode voltage range referred to pin vcc - (t min to t max ) 2.9 to 70 v t oper operational temperature range (t min to t max ) -40 to 125 c
TSC103 electrical characteristics doc id 16873 rev 1 7/23 3 electrical characteristics the electrical characteristics given in the following tables are measured under the following test conditions unless otherwise specified. t amb =25c, v cc+ =5v, v cc- connected to gnd (single-supply configuration). v sense =v p -v m =50mv, v m = 12 v, no load on out, all gain configurations. table 4. supply symbol parameter test cond itions min. typ. max. unit i cc total supply current v sense = 0 v, t min < t amb < t max 200 360 a i cc1 total supply current v sense = 50 mv av = 50 v/v t min < t amb < t max 300 480 a table 5. input symbol parameter test conditions min. typ. max. unit dc cmr dc common-mode rejection variation of v out versus v icm referred to input (1) 2.9 v< v m < 70 v t min < t amb < t max 90 105 db ac cmr ac common-mode rejection variation of v out versus v icm referred to input (peak-to-peak voltage variation) av=50v/v or 100v/v 2.9 v< v m < 30 v 1khz sine wave 95 db svr supply voltage rejection variation of v out versus v cc (2) sel1 = gnd, sel2 = gnd 2.7 v< v cc < 5.5 v v sense =30mv t min < t amb < t max 85 100 db v os input offset voltage (3) t amb =25 c t min < t amb < t max 500 1100 v dv os /dt input offset drift vs. t av = 50 v/v t min < t amb < t max -20 +5 v/c i lk input leakage current v cc =0v t min < t amb < t max 1a i ib input bias current v sense =0v t min < t amb < t max 10 15 a v il logic low voltage threshold (sel1 and sel2) v cc min < v cc < v cc max t min < t amb < t max -0.3 0.5 v v ih logic high voltage threshold (sel1 and sel2) v cc min < v cc < v cc max t min < t amb < t max 1.2 v cc v i sel gain-select pins (sel1 and sel2) input bias current sel pin connected to gnd or v cc t min < t amb < t max 400 na 1. see chapter 4: parameter definitions on page 10 for the definition of cmr. 2. see chapter 4 for the definition of svr. 3. see chapter 4 for the definition of v os .
electrical characteristics TSC103 8/23 doc id 16873 rev 1 table 6. output symbol parameter test conditions min. typ. max. unit av gain sel1 = gnd, sel2 = gnd sel1 = gnd, sel2 = vcc+ sel1 = vcc+, sel2 = gnd sel1 = vcc+, sel2 = vcc+ 20 25 50 100 v/v v out / t output voltage drift vs. t (1) av = 50 v/v t min < t amb < t max 240 ppm/c v out / i out output stage load regulation -10 ma < i out <10 ma i out sink or source current av = 50 v/v 0.3 1.5 mv/ma v out total output voltage accuracy (2) v sense =50mv (3) t amb =25 c t min < t amb < t max 2.5 4 % v out total output voltage accuracy v sense =90mv (3) t amb =25 c t min < t amb < t max 3.5 5 % v out total output voltage accuracy v sense =20mv t amb =25 c t min < t amb < t max 3.5 5 % v out total output voltage accuracy v sense =10mv t amb =25 c t min < t amb < t max 5.5 8 % v out total output voltage accuracy v sense =5mv t amb =25 c t min < t amb < t max 10 22 % i sc short-circuit current out connected to v cc or gnd 15 26 ma v oh output stage high-state saturation voltage v oh =v cc -v out v sense =1v i out =1ma 85 135 mv v ol output stage low-state saturation voltage v sense =-1 v i out =1ma 80 125 mv 1. see chapter 4: parameter definitions on page 10 for the definition of output vo ltage drift versus temperature. 2. output voltage accuracy is the difference with the expected theoretical output voltage v out-th =av*v sense . see chapter 4 for a more detailed definition. 3. except for av = 100 v/v.
TSC103 electrical characteristics doc id 16873 rev 1 9/23 table 7. frequency response symbol parameter test conditions min. typ. max. unit ts response to input differential voltage change. output settling to 1% of final value v sense square pulse applied to generate a variation of vout from 500 mv to 3 v c load =47pf av = 20 v/v, 3 s av = 25 v/v 4 s av = 50 v/v 6 av = 100 v/v 10 s t sel response to a gain change. output settling to 1% of final value any change of state of sel1 or sel2 pin 1s t rec response to common-mode voltage change. output settling to 1% of final value v cc+ =5v, v cc- =-5v v m step change from -2 v to 30 v or 30 v to -2 v 20 s sr slew rate v sense =10mv to 100mv 0.4 0.6 v/s bw 3 db bandwidth c load =47pf v m =12v v sense =50mv av = 50 v/v 700 khz table 8. noise symbol parameter test conditions min. typ. max. unit e n equivalent input noise voltage f = 1 khz 40 nv/ hz
parameter definitions TSC103 10/23 doc id 16873 rev 1 4 parameter definitions 4.1 common mode rejection ratio (cmr) the common-mode rejection ratio (cmr) meas ures the ability of the current-sensing amplifier to reject any dc voltage applied on both inputs v p and v m . the cmr is referred back to the input so that its effect can be compared with the applied differential signal. the cmr is defined by the formula: 4.2 supply voltage rejection ratio (svr) the supply-voltage rejection ratio (svr) me asures the ability of the current-sensing amplifier to reject any variat ion of the supply voltage v cc . the svr is referred back to the input so that its effect can be compared with the applied differential signal. the svr is defined by the formula: 4.3 gain (av) and input offset voltage (v os ) the input offset voltage is defined as the intersection between the linear regression of the v out vs. v sense curve with the x-axis (see figure 4 ). if v out1 is the output voltage with v sense =v sense1 and v out2 is the output voltage with v sense =v sense2 , then v os can be calculated with the following formula. cmr 20 ? v out v icm av ? ------------------------------ log ? = svr 20 ? v out v cc av ? ----------------------------- - log ? = v os v sense1 v sense1 v sense2 ? v out1 v out2 ? ----------------------------------------------- - v out1 ? ?? ?? ? =
TSC103 parameter definitions doc id 16873 rev 1 11/23 figure 4. v out versus v sense characteristics: detail for low v sense values the values of v sense1 and v sense2 used for the input offset calculations are detailed in ta bl e 9 . table 9. test conditions for v os voltage calculation av (v/v) v sense1 (mv) v sense2 (mv) 20 50 5 25 50 5 50 50 5 100 40 5 am04520 vo s v s en s e2 v s en s e vo u t v s en s e1 vo u t_1 vo u t_2
parameter definitions TSC103 12/23 doc id 16873 rev 1 4.4 output voltage drift versus temperature the output voltage drift versus temperature is defined as the maximum variation of v out with respect to its value at 25 c over the temperature range. it is calculated as follows: with t min < t amb < t max . figure 5 provides a graphical definition of the output voltage drift versus temperature. on this chart v out is always comprised in the area defined by the maximum and minimum variation of v out versus t, and t = 25 c is considered to be the reference. figure 5. output voltage drift versus temperature (av = 50 v/v vsense = 50 mv) v out t ---------------- -max v out t amb () v out 25 c () ? t amb 25 c ? -------------------------------------------------------------------------- = -60 -40 -20 0 20 40 60 -60 -40 -20 0 20 40 60 80 100 120 140 t (c) vout-vout@25c (mv)
TSC103 parameter definitions doc id 16873 rev 1 13/23 4.5 input offset dri ft versus temperature the input voltage drift versus temperature is defined as the maximum variation of v os with respect to its value at 25 c over the temperature range. it is calculated as follows: with t min < t amb < t max . figure 6. provides a graphical definition of the input offset drift versus temperature. on this chart v os is always comprised in the area defined by the maximum and minimum variation of v os versus t, and t = 25 c is considered to be the reference. figure 6. input offset drift versus temperature (av = 50 v/v) 4.6 output voltage accuracy the output voltage accuracy is the difference between the actual output voltage and the theoretical output voltage. ideally, the current sensing output voltage should be equal to the input differential voltage multiplied by the theoretical gain, as in the following formula. v out-th =av . v sense the actual value is very slightly different, mainly due to the effects of: the input offset voltage v os , the non-linearity. v os t -------------- -max v os t amb () v os 25 c () ? t amb 25 c ? --------------------------------------------------------------------- = -2.5 -2 -1.5 -1 -0.5 0 0.5 1 1.5 -60 -40 -20 0 20 40 60 80 100 120 140 t (c) vos-vos@25c (mv)
parameter definitions TSC103 14/23 doc id 16873 rev 1 figure 7. v out vs. v sense theoretical and actual characteristics the output voltage accuracy, expressed as a percentage, can be calculated with the following formula, with 20 v/v, 25 v/v, 50 v/v or 100 v/v depending on the configuration of the sel1 and sel2 pins. v s en s e 5 mv ide a l act ua l vo u t am04521 vo u t a cc u r a cy for v s en s e = 5 mv v out abs v out av v sense ? () ? () av v sense ? -------------------------------------------------------------------------- - =
TSC103 maximum permissible voltages on pins doc id 16873 rev 1 15/23 5 maximum permissible voltages on pins the TSC103 can be used in either single- or dual-supply configuration. the dual-supply configuration is achieved by disconnecting vcc- and gnd, and connecting vcc- to a negative supply. figure 8 illustrates how the absolute maximum vo ltages on input pins vp and vm are referred to the vcc- potential, while the maximum voltages on the positive supply pin, gain selection pins and output pins are referred to the gnd pin. it should also be noted that the maximum voltage between vcc- and vcc+ is limited to 15 v. figure 8. maximum voltages on pins +75 v vp a nd vm vcc+ -16 v +15 v +7 v vp a nd vm -0. 3 v vcc+ + 0. 3 v s el1, s el2 a nd o u t s el1, s el2 a nd o u t vcc- vcc- gnd vcc+ gnd -0. 3 v vcc+ am04522
application information TSC103 16/23 doc id 16873 rev 1 6 application information the TSC103 can be used to measure current and to feed back the information to a microcontroller. figure 9. single-supply configuration schematic the current from the supply flows to the load through the r sense resistor causing a voltage drop equal to v sense across r sense . the amplifier?s input currents are negligible, therefore its inverting input voltage is equal to v m . the amplifier's open-loop gain forces its non-inverting input to the same voltage as the inverting input. as a consequence, the amplifier adjusts current flowing through rg1 so that the voltage drop across rg1 matches v sense exactly. therefore, the drop across rg1 is: v rg1 =v sense =r sense .i load if i rg1 is the current flowing through rg1, then i rg1 is given by the formula: i rg1 =v sense /rg1 the i rg1 current flows entirely into resistor r g3 (the input bias current of the buffer is negligible). therefore, the voltage drop on the r g3 resistor can be calculated as follows. v rg3 =r g3 .i rg1 =(r g3 /r g1 ).v sense since the voltage across the r g3 resistor is buffered to the out pin, v out can be expressed as: v out =(r g3 /r g1 ).v sense or: v out =(r g3 /r g1) .r sense .i load 5 v v s en s e vo u t lo a d ilo a d r s en s e controller adc gnd vcc gpio1 gpio2 vp vm vcc+ t s c10 3 o u t gnd s el1 s el2 vcc- common-mode volt a ge: 2.9 v to 70 v am04517
TSC103 application information doc id 16873 rev 1 17/23 the resistor ratio r g3 /r g1 is internally set to 20 v/v fo r TSC103a, to 50 v/v for TSC103b and to 100 v/v for TSC103c. since they define the full-scale output range of the application, the r sense resistor and the r g3 /r g1 resistor ratio (equal to av) are important parameters and must therefore be selected carefully.
package information TSC103 18/23 doc id 16873 rev 1 7 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark.
TSC103 package information doc id 16873 rev 1 19/23 7.1 so-8 package information figure 10. so-8 package mechanical drawing table 10. so-8 package mechanical data ref. dimensions millimeters inches min. typ. max. min. typ. max. a1.750.069 a1 0.10 0.25 0.004 0.010 a2 1.25 0.049 b 0.28 0.48 0.011 0.019 c 0.17 0.23 0.007 0.010 d 4.80 4.90 5.00 0.189 0.193 0.197 e 5.80 6.00 6.20 0.228 0.236 0.244 e1 3.80 3.90 4.00 0.150 0.154 0.157 e 1.27 0.050 h 0.25 0.50 0.010 0.020 l 0.40 1.27 0.016 0.050 l1 1.04 0.040 k 0 8 1 8 ccc 0.10 0.004
package information TSC103 20/23 doc id 16873 rev 1 7.2 tssop-8 package information figure 11. tssop8 package mechanical drawing table 11. tssop8 package mechanical data ref. dimensions millimeters inches min. typ. max. min. typ. max. a1.200.047 a1 0.05 0.15 0.002 0.006 a2 0.80 1.00 1.05 0.031 0.039 0.041 b 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.008 d 2.90 3.00 3.10 0.114 0.118 0.122 e 6.20 6.40 6.60 0.244 0.252 0.260 e1 4.30 4.40 4.50 0.169 0.173 0.177 e 0.65 0.0256 k0 80 8 l 0.45 0.60 0.75 0.018 0.024 0.030 l1 1 0.039 aaa 0.10 0.004
TSC103 ordering information doc id 16873 rev 1 21/23 8 ordering information table 12. order codes part number temperature range package packaging marking TSC103ipt -40 c, +125 c tssop8 tape & reel 103i TSC103idt so-8 tape & reel TSC103i TSC103iypt (1) -40 c, +125 c automotive grade tssop8 tape & reel 103y TSC103iydt so-8 tape & reel TSC103y 1. qualification and characterization according to aec q100 and q003 or equivalent, advanced screening according to aec q001 & q002 or equivalent are on-going.
revision history TSC103 22/23 doc id 16873 rev 1 9 revision history table 13. document revision history date revision changes 04-jan-2010 1 initial release.
TSC103 doc id 16873 rev 1 23/23 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in milita ry, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2010 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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